1. Field of the Invention
This invention relates to semiconductor processing and more particularly to patterned field oxides which can be selectively thickened according to size and area of the oxides.
2. Background of the Relevant Art
A bare silicon surface will generally oxidize in air at room temperature, but because the growth is self-limiting, only a relatively small thickness can be achieved. The native oxide which is formed, provides a protective coating which prevents corrosion and prevents further oxidation in most room-temperature ambients. When the temperature is raised several hundred degrees C., the oxidation rate is much greater, and the oxide becomes denser and more durable. Accordingly, thermal oxidation of silicon has become a mainstay in the formation of oxides within active regions (gate oxides) and oxides within inactive regions (field oxides).
High temperature thermal oxides are formed by the direct oxidation of the silicon wafer surface at elevated temperatures in either a dry oxygen or a steam ambient. The resulting oxide is relatively impervious to diffusion species for at least as long as the time required for the diffusion to occur. Furthermore, the oxide is relatively free of pinholes. Most of the Group IIIA and VA dopants react with the thermally grown oxide to form silicates which gradually move through the oxide. Generally speaking, silicates do not form completely through and do not touch the underlying silicon and, therefore, do not become a diffusion source for the active or inactive regions. Thus, the thickness of the oxide must be carefully tailored to the required diffusion time and temperature.
While other materials such as chemical vapor deposition (CVD) oxide or nitride can be used as a mask against diffusion species, no commercially proven substitute for a thermal oxide currently exists to provide silicon pn junction passivation or MOS gate oxides. The prime importance of thermal oxide stems from its ability to properly terminate the silicon bond at the silicon-oxide interface. The deleterious electrical effects of a bare silicon surface, or of one covered only with room-temperature native oxides are thereby minimized with thermally grown oxides.
In order to form active and inactive regions, a process known as local oxidation of silicon (LOCOS) has been used to provide dielectric isolation. LOCOS utilizes a silicon nitride material (i.e., Si.sub.3 N.sub.4) to mask active regions from the growth of field oxide. Being somewhat impervious to oxygen diffusion, the silicon nitrite layer is placed upon bare silicon, or upon a pad oxide overlying bare silicon, at select regions upon the wafer. A subsequent oxidation step will thermally grow oxide predominantly where the nitride is not present. The oxidation rate upon the upper surface of the nitride is much slower than the rate upon the bare silicon between the nitrides. As such, the nitrides and small thin layer of oxide at the upper surface of the nitride is easily removed leaving thick field oxides in the non-masked areas.
Because of the high stress at the nitride-silicon interface, dislocations will often be generated in the silicon at the edges of the oxide (i.e., at the edges of the non-nitride windows). Interface dislocations and/or stress often exasperates the problem of lateral diffusion of oxygen within the silicon. Lateral diffusion of oxygen or lateral consumption of silicon by growing oxide at the nitride interface gives rise to "birdbeak" structures. Generally speaking, the density value reported for thermal oxide is close to that of fused silica and is almost the same as that of silicon. These densities, coupled with respective molecular weights of 60 and 28 (molecular weight of oxide and silicon, respectively), dictate that for every volume of silicon oxidized, 2.2 volumes of oxide will be generated. Silicon will therefore be consumed and the top of the oxide will rise above and extend outward from the original silicon surface.
As the density of integrated circuits increase and circuit dimensions decrease, the problems of lateral growth of field oxides are compounded. Furthermore, high density processes bring about another problem generally referred to as "field oxide thinning." Field oxide thinning and birdbeak formation is best described by referencing FIGS. 1 and 2. In FIG. 1, a cross-sectional view of a semiconductor substrate 10 is shown. Substrate 10 includes an upper surface adapted to receive a masking layer, such as silicon nitride, necessary for LOCOS processing. Silicon nitride is generally blanket deposited across the entire substrate and then etched to present a patterned silicon nitride 12. Windows, which are etched within the nitride layer to form pattern 12, can be either small or large area windows, A1 or A2, respectively.
Thermal oxides can be grown in either atmospheric or high pressure chambers. Atmospheric equipment cannot achieve the higher oxidation rate of high pressure equipment, however, atmospheric units are less expensive to operate and maintain. In either case, oxidation equipment forwards an oxidizing agent such as dry oxygen or steam across the upper surface of substrate 10. It is well recognized that growth resulting from the oxygen or steam will vary depending upon the size of the silicon surface presented to the ambient. The growth rate in confined spaces or areas, such as area A1, is less than growth in larger areas, such as area A2. Furthermore, the oxide grown in a confined area usually has an increased stress within the resulting product. Accordingly, FIG. 2 illustrates varying growth rates in directions lateral and perpendicular to substrate 10 upper surface. For a given oxidation time, thickness t1 is shown less than thickness t2. Birdbeak areas 18 occur to further lessen active areas between field oxide 20 and 22.
Growth of field oxides 20 and 22 depend upon many factors, including: oxidation time, oxidizing ambient, ambient pressure and/or temperature, impurity in the silicon, the amount of stress in the oxide and silicon, and area of silicon exposed to the ambient. Oxide thinning is the result of oxides growing at a slower rate in small areas than in larger areas. The result of small oxide growth, or oxide thinning, is that of a smaller dielectric thickness t1 in some field areas than in others--i.e., thickness t2 of large oxide 22. A thinner dielectric, when coupled with an overlying conductor, presents parasitic capacitance. If the dielectric is small enough, field inversion beneath of thinner dielectric will occur. High density integrated circuits further compound the field thinning effect and can lead to "turn-on" channels in areas where a channel should not exist. Such problems can lead to inoperability of the resulting circuit.